The invention relates to differential common base amplifier circuits, especially of the type having field effect transistor input stages, and more particularly to circuitry for preventing variations in the gate to source voltage characteristics of the field effect transistors from causing variations in the input offset voltages of the differential common base amplifier circuits, and still more particularly to techniques for preventing roll off of the frequency response of differential common base amplifier circuits.
Several differential common base amplifiers are known, and have various advantages, including optimum bandwidth that results from the use of the common base connection of bipolar transistors. I.e., differential common base amplifiers have high frequency response because the common base connection of a bipolar transistor has superior bandwidth characteristics. However, since the "input characteristics" of a common base connection of a bipolar transistor have various shortcomings, including the disadvantage that the input impedance of a common base connected transistor at its emitter terminal is low, its DC input current is high and its associated noise current is high. For these reasons, it is common to drive the two inputs of a common base differential input stage with emitter follower circuits. The input impedance of such follower circuits is very high, resulting in fairly low input currents and low associated noise currents. But it would be very desirable for certain low noise applications to have lower noise currents than is achievable with bipolar emitter followers. Ordinarily, JFET input circuitry would be used to achieve low noise operation, but, for the reasons subsequently explained, JFET source followers are incompatible with common base differential input circuitry.
Before describing the limitations of common base differential input stages driven by source follower circuits it will be helpful to briefly describe the structure and shortcomings of such a device with reference to FIG. 5 of the appended drawings. Referring now to FIG. 5, reference numeral 40 designates a typical prior art, common base differential input stage including two NPN transistors 8 and 9 having their bases connected together. The base of transistor 8 is connected to its collector and to a constant current source circuit 12. Typically the output of a bipolar emitter follower (not shown) is connected to the emitter of transistor 8. Similarly the collector of transistor 9 is connected to a second current source 13. Typically, the output of another emitter follower is connected to the emitter of transistor 9. The collector of NPN transistor 9 is coupled by means of conductor 11 to the base of an NPN output transistor 14. The emitter of transistor 14 is normally connected to a relatively constant voltage source circuit which is schematically represented by a battery having a voltage V.sub.B in FIG. 5. The collector of output transistor 14 is connected to a constant current source load circuit 18. The constant current sources of circuits 12, 13, and 18 can be lateral PNP current mirror circuits, which have high dynamic resistance, and are well known to those skilled in the art. An output voltage V.sub.O is produced on the collector of output transistor 14.
It is desirable that transistor 14 be an NPN transistor, even though for simple biasing, a PNP transistor would be better because lateral PNP transistors that can be fabricated in conventional bipolar integrated circuit manufacturing processes commonly used for linear integrated circuits have very low frequency response.
It would be desirable to use FET source followers, as shown in FIG. 5, in order to achieve low noise operation. But, unfortunately, in the circuit shown in FIG. 5, wherein the voltage at the emitter of transistor 14 is relatively constant, and source followers 4 and 5 are used as shown, if there are shifts in the gate-to-source voltage characteristic of JFET (junction field effect transistors) 4 caused by variations in integrated circuit processing variations or by variations in operating temperature of the circuit, such variations in the gate-to-source voltage characteristic of field effect transistor 4 result in a corresponding change in the voltage on the bases of NPN transistors 8 and 9. Since the voltage of the emitter, and hence also of the base, of output transistor 14 remains relatively constant, there is an equal change in the collector to base voltage of transistor 9. Shifts of one to three volts in the gate-to-source voltage characteristic of junction field effect transistors are common for bipolar integrated circuit manufacturing processes that are most commonly used. (The "gate-to-source voltage characteristic" is value of the gate-to-source voltage V.sub.GS of the JFET for a predetermined drain current.) Obviously, such voltage variations, when imposed on the collector-to-base voltage of transistor 9, but not transistor 8, result in unacceptable variations of 0.3 to 1.2 millivolts in the input offset voltage of the differential pair of transistors 8 and 9, since input offset errors of more than 0.1 millivolts are usually unacceptable.
This mismatch between the collector-to-base voltages of transistors 8 and 9 results in an input offset voltage caused by the above-mentioned shifts in the gate-to-source voltage characteristic of the field effect transistor 4, of base width modulation in transistor 9. This input offset voltage could be multiplied by the stage of gain including transistor 9 and current source 13, followed by the stage including transistor 14 and constant current source 18.
Furthermore, any common mode voltage component of V.sub.in1 and V.sub.in2 similarly causes a corresponding change in the collector-to-base voltage of transistor 9; the resulting base-width modulation of transistor 9 does not occur in transistor 8, so input offset errors occur in the differential stage including transistors 8 and 9 and are amplified by the high gain of the circuit.
Because of these obvious problems, no one is known to have used source follower input circuitry in a differential common base amplifier to obtain low noise, high gain performance.
Thus, there remains an unmet need for a simple, easily fabricated differential common base amplifier circuit with very low noise performance, and for such a circuit that makes it possible to conveniently take advantage of the high frequency response characteristics of a bipolar NPN integrated circuit connected in a common base configuration.